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IDT74AUC164245 CMOS 16-BIT LEVEL SHIFTING BUS TRANSCEIVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
CMOS 16-BIT LEVEL SHIFTING BUS TRANSCEIVER WITH 3-STATE OUTPUTS
FEATURES: DESCRIPTION:
IDT74AUC164245 ADVANCE INFORMATION
* VDDA AND VDDB = 0.8V - 2.7V * Inputs/outputs tolerant up to 3.6V * ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) * Supports Hot insertion: * A and B port output drivers: 9mA @ 2.3V * Available in TSSOP, TVSOP, and VFBGA packages
APPLICATIONS:
* High performance, low voltage communications systems * High performance, low voltage computing systems
This 16-bit level shifting bus transceiver is built using advanced CMOS technology. The AUC164245 is ideal for asynchronous communications between data buses. The control function implementation minimizes external timing requirements. The AUC164245 16-bit level shifting bus transceiver contains two separate supply rails. The B port is designed to track VDDB, which accepts voltages from 0.8V to 2.7V. The A port and control inputs are designed to track VDDA, which accepts voltages from 0.8V to 2.7V. This allows for user-selectable translation for various level shifting system environments. This device can be used as one 16-bit transceiver or two 8-bit transceivers. It allows data transmission from A bus to B bus or from B bus to A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses are effectively isolated. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The AUC164245 A and B ports are designed with 9mA output drivers. These drivers are capable of driving moderate loads while maintaining high speed performance. To ensure the high-impedance state during power up or power down, OE should be tied to VDDA through a pull-up resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
FUNCTIONAL BLOCK DIAGRAM
1DIR
1 48
2D IR 1O E
24
25 36 13 35
2O E
1A 1
47 2 46
2A 1 1B 1 2A 2
3
2B 1
1A 2 1B 2
14
2B 2 2A 3
33 16
44
1A 3
5
1B 3
2B 3
0.8V - 2.7V
43
0.8V - 2.7V
1A 4
32
2A 4
17 30 19 29
0.8V - 2.7V
6
1B 4
41
2B 4
1A 5
8
2A 5
1B 5 1A 6
40
2B 5
2A 6
9 38 11
1B 6 2A 7 1B 7
27
20
2B 6
1A 7
22
2B 7
1A 8
37
2A 8
12
26
1B 8
23
2B 8
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
1
(c) 2003 Integrated Device Technology, Inc.
JANUARY 2003
DSC-5970/19
0.8V - 2.7V
IDT74AUC164245 CMOS 16-BIT LEVEL SHIFTING BUS TRANSCEIVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
PINOUT CONFIGURATION
6
1OE
1A2
1A4
1A6
1A8
2A1
2A3
2A5
2A7
2OE
5
NC
1A1
1A3
1A5
1A7
2A2
2A4
2A6
2A8
NC
4
NC
GND
VDDA
GND
GND
VDDA
GND
NC
3
NC
GND
VDDB
GND
GND
VDDB
GND
NC
2
NC
1B1
1B3
1B5
1B7
2B2
2B4
2B6
2B8
NC
1
1DIR
1B2
1B4
1B6
1B8
2B1
2B3
2B5
2B7
2DIR
A
B
C
D
E
F
G
H
J
K
NOTE: NC = No Internal Connection
VFBGA
56 BALL VFBGA PACKAGE LAYOUT
A 6 5 4 3 2 1 B C D E F G H J K
TOP VIEW
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IDT74AUC164245 CMOS 16-BIT LEVEL SHIFTING BUS TRANSCEIVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
PIN CONFIGURATION
1DIR 1B1 1B2
ABSOLUTE MAXIMUM RATINGS FOR VDDA OR VDDB(1)
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
1OE 1A1 1A2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
Symbol VTERM VTERM
Description Terminal Voltage with Respect to GND (all input and VDD terminals) Terminal Voltage with Respect to GND (any I/O or Output terminals in highimpedance or power-off state)
Max -0.5 to +3.6 -0.5 to +3.6
Unit V V
GND
1B3 1B4
GND
1A3 1A4
VTERM
Terminal Voltage with Respect to GND (any I/O or Output terminals in high or low state)
-0.5 to +3.6
V
VDDB
1B5 1B6
VDDA
1A5 1A6
TSTG IOUT IIK IOK IDD ISS
Storage Temperature Continuous DC Output Current Continuous Clamp Current Continuous Current through each VDD or GND VI > VDD VI < 0
-65 to +150 20 +50 -50 -50 100
C mA mA mA mA
GND
1B7 1B8 2B1 2B2
GND
1A7 1A8 2A1 2A2
Continuous Clamp Current, VO < 0
GND
2B3 2B4
GND
2A3 2A4
NOTE: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
VDDB
2B5 2B6
VDDA
2A5 2A6
GND
2B7 2B8 2DIR
GND
2A7 2A8 2OE
2.5V)
CIN CI/O
CAPACITANCE (TA = +25C, f = 1.0MHz, VDDA or VDDB =
Symbol Parameter Input Capacitance(1) I/O Port Capacitance(2) Conditions VIN = VDD or GND VI/O = VDD or GND Typ. 2.5 6 Max. Unit 4 7 pF pF
TSSOP/ TVSOP TOP VIEW
NOTES: 1. Applies to the Control Inputs. 2. Applies to ports A and B.
PIN DESCRIPTION
Pin Names xOE xDIR xAx xBx VDDA VDDB Description 3-State Output Enable Control Inputs (Active Low)(1) Direction Control Inputs
(1) (1)
FUNCTION TABLE (EACH 8-BIT SECTION)(1)
Inputs xOE L L H
NOTE: 1. H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care Z = High-Impedance
xDIR L H X
Outputs Bus B Data to Bus A Bus A Data to Bus B Z
A Side Inputs or 3-State Outputs Supply for A port, xOE, xDIR Supply for B port
B Side Inputs or 3-State Outputs(2)
NOTES: 1. Powered from VDDA. 2. Powered from VDDB.
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IDT74AUC164245 CMOS 16-BIT LEVEL SHIFTING BUS TRANSCEIVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
RECOMMENDED OPERATING CHARACTERISTICS(1)
Symbol(2) VDDX Parameter Supply Voltage VDDX = 0.8V VDDX = 1.1V to 1.3V VIH(3) Input HIGH Voltage Level VDDX = 1.4V to 1.6V VDDX = 1.65V to 1.95V VDDX = 2.3V to 2.7V VDDX = 0.8V VDDX = 1.1V to 1.3V VIL(3) Input LOW Voltage Level VDDX = 1.4V to 1.6V VDDX = 1.65V to 1.95V VDDX = 2.3V to 2.7V VI VO Input Voltage Output Voltage Active State 3-State VDDX = 0.8V VDDX = 1.1V IOH HIGH Level Output Current VDDX = 1.4V VDDX = 1.65V VDDX = 2.3V VDDX = 0.8V VDDX = 1.1V IOL LOW Level Output Current VDDX = 1.4V VDDX = 1.65V VDDX = 2.3V t/v TA Input Transition Rise or Fall Time Operating Free-Air Temperature Test Conditions(2) Min.(2) 0.8 VDDX 0.65 x VDDX 0.65 x VDDX 0.65 x VDDX 1.7 -- -- -- -- -- 0 0 0 -- -- -- -- -- -- -- -- -- -- -- -40 Max.(2) 2.7 -- -- -- -- -- 0 0.35 x VDDX 0.35 x VDDX 0.35 x VDDX 0.7 2.7 VDDX 2.7 -0.7 -3 -5 -8 -9 0.7 3 5 8 9 5 +85 ns/V C mA mA V V V V Unit V
NOTES: 1. All unused inputs of the device must be held at VDD or GND to ensure proper operation. 2. Where VDDX refers to either VDDA or VDDB, depending on which side output A or B is on. 3. VIL,VIH limits apply for outputs operating at adjacent voltage ranges. For example, 1.8V VIL/VIH limits apply for outputs operating at 1.5V or 2.5V.
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IDT74AUC164245 CMOS 16-BIT LEVEL SHIFTING BUS TRANSCEIVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE (A PORT OR B PORT)(1)
Following Conditions Apply Unless Otherwise Specified: Operating Conditions: TA = -40C to +85C
Symbol IIH IIL IOFF IOZH(3) IOZL
(3)
Parameter Input HIGH or LOW Current Data Inputs Control Inputs Input/Output Power Off Leakage High Impedance Output Current (3-State Output Pins) Quiescent Power Supply Current
Test Conditions(2) VDDX = 2.7V, VI = VDDX or GND VDDX = 0V, VIN or VO 2.7V VDDX = 2.7V VDDX = 0.8V to 2.7V VIN = GND or VDDX VO = VDDX VO = GND
Min.(2) -- -- -- -- -- --
Typ.(2) -- -- -- -- -- --
Max.(2) 10 5 10 10 10 20
Unit A A A A
IDDL IDDH IDDZ
NOTES: 1. All unused inputs of the device must be held at VDD or GND to ensure proper operation. 2. Where VDDX refers to either VDDA or VDDB, depending on which side output A or B is on. 3. For the I/O ports, the parameters IOZH and IOZL include the input leakage current.
OUTPUT DRIVE CHARACTERISTICS (A PORT OR B PORT)
Symbol Parameter Test Conditions(1,6) VDDX = 0.8V - 2.7V VDDX = 0.8V VDDX = 1.1V(2) VDDX = 1.4V(3) VDDX = 1.65V(4) VDDX = 2.3V(5) VDDX = 0.8V - 2.7V VDDX = 0.8V VDDX = 1.1V(2) VDDX = 1.4V(3) VDDX = 1.65V(4) VDDX = 2.3V(5) IOH = -100A IOH = -0.7mA IOH = -3mA IOH = -5mA IOH = -8mA IOL = -9mA IOL = 100A IOL = 0.7mA IOL = 3mA IOL = 5mA IOL = 8mA IOL = 9mA Min.(6) VDDX - 0.1 -- 0.8 1 1.2 1.8 -- -- -- -- -- -- Typ. -- 0.55 -- -- -- -- -- 0.25 -- -- -- -- Max.(6) -- -- -- -- -- -- 0.2 -- 0.3 0.4 0.45 0.6 Unit
VOH
Output HIGH Voltage
V
VOL
Output LOW Voltage
V
NOTES: 1. VIL and VIH must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS table for the appropriate VDD range. TA = -40C to +85C. 2. Demonstrates operation for nominal VDDA or VDDB = 1.2V. 3. Demonstrates operation for nominal VDDA or VDDB = 1.5V. 4. Demonstrates operation for nominal VDDA or VDDB = 1.8V. 5. Demonstrates operation for nominal VDDA or VDDB = 2.5V. 6. Where VDDX refers to either VDDA or VDDB, depending on which side output A or B is on.
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IDT74AUC164245 CMOS 16-BIT LEVEL SHIFTING BUS TRANSCEIVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
OPERATING CHARACTERISTICS, A TO B, VDDA AND VDDB = 2.5V, TA = 25C
Symbol CPDA CPDB Parameter Power Dissipation Capacitance Power Dissipation Capacitance Outputs Enabled Outputs Disabled Outputs Enabled Outputs Disabled Test Conditions CL = 0pF f = 10MHz CL = 0pF f = 10MHz Typ. 3 0.4 1.4 1.5 Unit pF pF
OPERATING CHARACTERISTICS, B TO A, VDDA AND VDDB = 2.5V, TA = 25C
Symbol CPDA CPDB Parameter Power Dissipation Capacitance Power Dissipation Capacitance Outputs Enabled Outputs Disabled Outputs Enabled Outputs Disabled Test Conditions CL = 0pF f = 10MHz CL = 0pF f = 10MHz Typ. 14 1.5 3 0.4 Unit pF pF
SWITCHING CHARACTERISTICS, VDDA = 0.8(1,2)
VDDB = 0.8V Symbol tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tPZH tPZL tPHZ tPLZ Parameter Propagation Delay xAx to xBx Propagation Delay(3) xBx to xAx Output Enable Time(4) xOE to xAx Output Disable Time(4) xOE to xAx Output Enable Time xOE to xBx Output Disable Time xOE to xBx
(3)
VDDB = 1.2V0.1V Typ. 5 11 7.5 8.5 4.8 6.8 Unit ns ns ns ns ns ns
Typ. 10 10 7.5 8.5 10.5 12
SWITCHING CHARACTERISTICS, VDDA = 1.2V 0.1(1)
VDDB = 0.8V Symbol tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tPZH tPZL tPHZ tPLZ Parameter Propagation Delay(3) xAx to xBx Propagation Delay(3) xBx to xAx Output Enable Time(4) xOE to xAx Output Disable Time(4) xOE to xAx Output Enable Time xOE to xBx Output Disable Time xOE to xBx Typ. 11 5 3.2 4.6 9 9.5 VDDB = 1.2V0.1V Min. 1 1 0.7 0.8 0.7 0.8 Max. 4.5 4.5 4.6 6.2 4.6(4) 6.2(4) VDDB = 1.5V0.1V Min. 0.5 0.5 0.7 0.8 0.7 0.8 Max. 3.5 4.5 4.6 6.2 3.6 5 VDDB = 1.8V0.15V Min. 0.5 0.5 0.7 0.8 0.7 0.8 Typ. 2 3 3.2 4.6 2.2 3.5 Max. 3.5 4.2 4.6 6.2 3.6 4.8 VDDB = 2.5V0.2V Min. 0.5 0.5 0.7 0.8 0.7 0.8 Max. 3 4 4.6 6.2 3.5 4.3 Unit ns ns ns ns ns ns
NOTES: 1. See TEST CIRCUITS AND WAVEFORMS. TA = -40C to +85C. 2. The temperature range for the 0.8V node is 0C to +85C. 3. Propagation delay is symmetrical A-B, depending only on input and output VDD. 4. Enable/Disable to xAx depends on VDDA only. Times for xBx same if VDDA = VDDB.
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IDT74AUC164245 CMOS 16-BIT LEVEL SHIFTING BUS TRANSCEIVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
SWITCHING CHARACTERISTICS, VDDA = 1.5V 0.1(1)
VDDB = 1.2V0.1V Symbol tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tPZH tPZL tPHZ tPLZ Parameter Propagation Delay(2) xAx to xBx Propagation Delay(2) xBx to xAx Output Enable Time(3) xOE to xAx Output Disable Time(3) xOE to xAx Output Enable Time xOE to xBx Output Disable Time xOE to xBx Min. 0.5 0.5 0.7 0.8 0.7 0.8 Max. 4.5 3.5 3.3 4.5 4.3 5.5 VDDB = 1.5V0.1V Min. 0.5 0.5 0.7 0.8 0.7 0.8 Max. 3.3 3.3 3.1 4.7 3.1(3) 4.7(3) VDDB = 1.8V0.15V Min. 0.5 0.5 0.7 0.8 0.7 0.8 Typ. 2.3 2 2.3 3 2.3 3 Max. 3.1 3 3.3 4.5 3.3 4.5 VDDB = 2.5V0.2V Min. 0.5 0.5 0.7 0.8 0.7 0.8 Max. 2.6 2.8 3.3 4.5 3.2 3.7 Unit ns ns ns ns ns ns
SWITCHING CHARACTERISTICS, VDDA = 1.8V 0.15(1)
VDDB = 1.2V0.1V Symbol tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tPZH tPZL tPHZ tPLZ Parameter Propagation Delay(2) xAx to xBx Propagation Delay(2) xBx to xAx Output Enable Time(3) xOE to xAx Output Disable Time(3) xOE to xAx Output Enable Time xOE to xBx Output Disable Time xOE to xBx Min. 0.5 0.5 0.7 0.8 0.7 0.8 Max. 4.2 3.5 3 4.3 4 5.3 VDDB = 1.5V0.1V Min. 0.5 0.5 0.7 0.8 0.7 0.8 Max. 3 3.1 3 4.3 3 4.3 VDDB = 1.8V0.15V Min. 0.5 0.5 0.7 0.8 0.7 0.8 Typ. 2 2 2.1 3.2 2.1(3) 3.2(3) Max. 2.8 2.8 3 4.3 3(3) 4.3(3) VDDB = 2.5V0.2V Min. 0.5 0.5 0.7 0.8 0.7 0.8 Max. 2.5 2.6 3 4.3 2.8 3 Unit ns ns ns ns ns ns
SWITCHING CHARACTERISTICS, VDDA = 2.5V 0.2(1)
VDDB = 1.2V0.1V Symbol tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tPZH tPZL tPHZ tPLZ Parameter Propagation Delay(2) xAx to xBx Propagation Delay(2) xBx to xAx Output Enable Time(3) xOE to xAx Output Disable Time(3) xOE to xAx Output Enable Time xOE to xBx Output Disable Time xOE to xBx Min. 0.5 0.5 0.7 0.8 0.7 0.8 Max. 4 3 2.6 2.9 4 5.3 VDDB = 1.5V0.1V Min. 0.5 0.5 0.7 0.8 0.7 0.8 Max. 2.8 2.6 2.6 2.9 2.8 4.1 VDDB = 1.8V0.15V Min. 0.5 0.5 0.7 0.8 0.7 0.8 Typ. 1.8 1.7 1.8 2 2 3 Max. 2.6 2.5 2.6 2.9 3.1 4.3 VDDB = 2.5V0.2V Min. 0.5 0.5 0.7 0.8 0.7 0.8 Max. 2.2 2.2 2.6 2.9 2.6(3) 2.9(3) Unit ns ns ns ns ns ns
NOTES: 1. See TEST CIRCUITS AND WAVEFORMS. TA = -40C to +85C. 2. Propagation delay is symmetrical A-B, depending only on input and output VDD. 3. Enable/Disable to xAx depends on VDDA only. Times for xBx same if VDDA = VDDB.
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IDT74AUC164245 CMOS 16-BIT LEVEL SHIFTING BUS TRANSCEIVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
TEST CIRCUITS AND WAVEFORMS
Symbol VLOAD VT VLZ VHZ RL CL VDDX(1) = 0.8V 2xVDDx(1) VDDX/2(1) 100 100 2 15 VDDX(1) = 1.2V0.1V 2xVDDx(1) VDDX/2(1) 100 100 2 15 VDDX(1) = 1.5V0.1V 2xVDDx(1) VDDX/2(1) 100 100 2 15 VDDX(1) = 1.8V0.15V 2xVDDx(1) VDDX/2(1) 100 100 1 30 VDDX(1) = 2.5V0.2V 2xVDDx(1) VDDX/2(1) 150 150 0.5 30 Unit V V mV mV k pF
NOTE: 1. Where VDDX refers to either VDDA or VDDB.
VDD
VLOAD Open RL GND
SAME PHASE INPUT TRANSITION tPLH OUTPUT tPLH tPHL tPHL
VDDX (2) VT 0V VOH VT VOL VDDX (2) VT 0V
Pulse Generator
(1)
VIN D.U.T.
VOUT
RT
RL CL
OPPOSITE PHASE INPUT TRANSITION
Propagation Delay Test Circuits for All Outputs
DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. NOTE: 1. Pulse Generator for All Pulses: Rate 10MHz; Slew Rate 1V/ns.
ENABLE CONTROL INPUT tPZL OUTPUT SW ITCH NORMALLY CLO SED LOW tPZH OUTPUT SW ITCH NORMALLY OPEN HIGH VLOAD/2 VT tPHZ VT 0V tPLZ DISABLE VDDX(2) VT 0V VLOAD/2 VOL + VLZ VOL VOH VOH - VHZ 0V
SWITCH POSITION
Test Open Drain Disable Low Enable Low Disable High Enable High All Other Tests Switch VLOAD GND Open
NOTES: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. 2. Where VDDX refers to either VDDA or VDDB
Enable and Disable Times
8
IDT74AUC164245 CMOS 16-BIT LEVEL SHIFTING BUS TRANSCEIVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
ORDERING INFORMATION
IDT XX X AUC Bus-Hold Temp. Range XX Family XXX Device Type XX Package X Grade I BV PA PF 4245 Industrial Temperature Range Very Fine Pitch Ball Grid Array Thin Shrink Small Outline Package Thin Very Small Outline Package 16-Bit Level Shifting Bus Transceiver with 3-State Outputs Double-Density No Bus-Hold - 40C to +85C
16 Blank 74
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